Field of the Invention
The invention relates to a semiconductor module containing an addressing circuit for addressing memory cells of a memory array. An amplifier circuit is provided for amplifying a signal read from a memory cell and an input/output circuit is provided for reading data in or from the memory cells. A voltage supply circuit supplies an internal voltage to the components. A first evaluation circuit is connected to a switching signal and is suitable for outputting a switch-off signal for switching off the voltage supply circuit via an output if the switching signal represents a switch-off signal.
Semiconductor memory modules are used in the form of synchronous dynamic random access memories (SDRAMs), for example, for storing a large number of data with a fast access time. By way of example, memory cells with capacitors are used to store the data. The information is stored in the charge of the storage capacitor of the memory cell. Since the charge in the storage capacitor decreases over time, the charge state of the storage capacitor has to be regularly refreshed.
Semiconductor memory modules are increasingly used in mobile devices, too, such as e.g. a laptop or a mobile radio device. Since the mobile devices themselves usually carry only a limited current capacity, a low current consumption of the semiconductor memory modules is of substantial importance particularly in these applications.
A semiconductor module of the generic type that has two evaluation circuits that monitor a switching signal is already known. The evaluation circuits switch the internal voltage supply on or off depending on the signal state of the switching signal. In this way, it is possible to adapt the functionality of the internal voltage supply circuit to the actual current requirement. This procedure affords the advantage that the internal voltage supply circuit consumes less current in the switched-off state than in the switched-on state.
Published, Non-Prosecuted German Patent Application DE 4 028 175 A1, corresponding to U.S. Pat. No. 5,167,024, discloses an energy management configuration for a portable computer. The energy management configuration is provided for managing and distributing the energy which is drawn from a battery and used to supply a central unit, a memory and a plurality of peripheral devices including a user-interactive device. The energy management configuration has a control device coupled to the central unit for receiving commands from the central unit and also to the user-interactive device for receiving user inputs. The control device is additionally coupled to the battery for controlling the energy distribution between various computer units. In order to reduce the current consumption, the clock frequency of an internal clock generator is varied. Less current is consumed by prescribing a lower clock frequency.
It is accordingly an object of the invention to provide a semiconductor memory module with a low current consumption that overcomes the above-mentioned disadvantages of the prior art devices of this general type, which has a reduced current consumption.
With the foregoing and other objects in view there is provided, in accordance with the invention, a semiconductor memory module. The semiconductor memory module containing a memory array having memory cells, an addressing circuit for addressing the memory cells of the memory array, an amplifier circuit connected to the memory cells for amplifying a signal read from the memory cells, an input/output circuit connected to the memory array for reading data to/from the memory cells, a voltage supply circuit providing an internal voltage for components of the semiconductor memory module and having an input, and a first evaluation circuit having an input receiving a switching signal. The first evaluation circuit has an output coupled to the voltage supply circuit and outputs a switch-off signal for switching off the voltage supply circuit if the switching signal represents a switch-off state. A second evaluation circuit has an input receiving the switching signal. The second evaluation circuit has an output connected to the voltage supply circuit. The second evaluation circuit receives a voltage made available to the semiconductor memory module from an external voltage source. The second evaluation circuit outputs a switch-on signal to the voltage supply circuit if the switching signal represents a switch-on state.
One advantage of the invention consists in providing two evaluation circuits, a first evaluation circuit being supplied with current by an internal voltage supply and a second evaluation circuit being supplied with current by an external voltage supply. The second evaluation circuit monitors a switch-on signal for the internal voltage supply circuit. The first evaluation circuit monitors a switch-off signal for the internal voltage supply circuit. If a switch-off signal is identified by the first evaluation circuit, then the first evaluation circuit outputs a switch-off signal for switching off the voltage supply circuit. If the second evaluation circuit identifies a switch-on signal for the internal voltage supply circuit, then the second evaluation circuit switches the voltage supply circuit on again. As a result, the first evaluation circuit is also supplied with a sufficiently large supply voltage again.
The provision of two evaluation circuits makes it possible to optimally adapt the performance and the current consumption of the two evaluation circuits for the two different areas of use and tasks of the two evaluation circuits. Consequently, less current is consumed overall by the semiconductor memory module.
Preferably, the internal voltage supply circuit is switched off in the event of a deep power down command from the first supervisory circuit. In mobile devices, in particular, it is advantageous for the internal voltage supply circuit to be at least partially switched off in the event of an expected operating state in which only a very small current or hardly any current at all is required.
In one preferred embodiment, the internal voltage supply circuit is switched on or off only by the first supervisory circuit. This provides simplified driving for switching the voltage supply circuit on or off.
In a further preferred embodiment, provision is made of an amplifier circuit for receiving and forwarding the switching signal to a supervisory circuit in the second evaluation circuit. The output of the supervisory circuit forms the output of the second evaluation circuit. In this preferred embodiment, the output of the supervisory circuit is fed back to an input of the amplifier circuit. If the supervisory circuit identifies that the internal voltage supply circuit is to be switched off, then the supervisory circuit passes a switch-on signal to the amplifier circuit. Thus, the amplifier circuit of the second evaluation circuit is activated only when the internal voltage supply circuit is switched off. Consequently, no current is consumed by the amplifier circuit during an active internal voltage supply circuit. The current consumption is thus reduced overall.
In one preferred embodiment, the first supervisory circuit is configured in the form of an RS flip-flop circuit.
In a further preferred embodiment, the evaluation circuit is configured in the form of a second amplifier circuit, a command decoder and a second supervisory circuit. The second amplifier circuit is connected to the switching signal, the command decoder is connected to the output of the second amplifier circuit and the second supervisory circuit is connected to the output of the command decoder.
In one preferred embodiment, the output of the second supervisory circuit is connected to an input of the first supervisory circuit.
A further embodiment of the invention has a common amplifier circuit for the first and second evaluation circuits. As a result, overall less space is required on the semiconductor memory module in order to realize the circuit configuration according to the invention.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a semiconductor memory module with low current consumption, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.